TSMC has never commented on orders and customer status. The industry believes that TSMC officially revealed that the 3D IC package has entered the mass production timeline, which means that the global chip back-end package enters a true new era of 3D. After TSMC has mastered the advanced process advantages, combined with advanced back-end packaging technology, it will have an advantage for future orders. Will continue to maintain the industry's leading position.
Advanced packaging has recently been seen as a tool to extend Moore's Law, dramatically increasing chip functionality through chip stacking. The CoWoS and integrated fan-out package (InFO) introduced by TSMC in recent years are designed to provide integrated services from chip manufacturing to back-end packaging in response to customer expectations.
TSMC stressed that CoWoS and integrated fan-out package (InFO) are still 2.5D IC packages. In order to make the chip more powerful, the chip industry has spent considerable time developing small-sized and more complex 3D ICs. Combined with more difficult boring (TSV) technology, as well as wafer thinning, conductive material fill, wafer connection and thermal support.
Although TSMC did not disclose the cooperation and development targets, the industry believes that the 3D IC packaging technology level is very high, mainly used to integrate the most advanced processors, data chips, high-frequency memory, CMOS image sensors and micro-electro-mechanical systems (MEMS), generally required Companies with this technology are mostly internationally renowned system plants. Based on the TSMC technology development blueprint, Apple should be the first customer to introduce 3D IC packaging technology.